The Web Site to Remember National Semiconductor's Series 32000 Family

M32632 Overview

The M32632 is an FPGA implementation of the Series 32000 architecture. The design is compatible to the NS32532 CPU and the NS32381 FPU. This will guarantee that existing software is running without modifications. The performance will be higher than the origin.

National Semiconductor never build a NS32632. In Spring 2011 I asked National whether they have a problem with the name and they said "please don't use the NS in front". I choosed "M" for some reasons and the M32632 was born.

In June 2015 the M32632 version 1.0 was released at after nearly six years of development. One year later in August 2016 the version 2.0 was released. Many unexpected bug fixes were necessary and a change in architecture improved the clock speed. The table below compares some key characteristics of the M32632 V2 with the NS32532.

FeatureNS32532M32632 V2
Clock Frequency30 MHz max.50 MHz typ.
Basic Instruction Cycle Count21
Data Cache Size1024 bytes8192 bytes
Data Cache Associativitytwo waytwo way
Instruction Cache Size512 bytes8192 bytes
Instruction Cache Associativitydirect mappedtwo way
TLB Size64 entries2 * 256 entries
TLB Associativityfully associativedirect mapped

This chapter was last modified on 15 August 2016. Next chapter: FPGA