PC532E
The PC532E is a new implementation of the PC532 system. The design is based on my TITAN3 system. The FPGA of this system contains all the peripherals of the PC532 : the interrupt control unit ICU (NS32202) , one DUART (SCN2681) and the SCSI controller DP8490 from National Semiconductor. In addition it translates SCSI accesses into IDE commands. The first idea of using an original SCSI drive was later skipped and now a 160 Gbytes 2.5 inch notebook IDE drive is used. Modifying the operating system of the PC532 was not possible at that time.
Fig. 1. Test system of PC532E.
Figure 1 shows a first test system implementation. A small experimental PCB contains a switch mode power supply IC generating the 5 V for the system. A high speed serial connection to a host computer is used for developmemt purposes. Of course there is a white LED for everything.
Figure 2 shows the backside of the system PCB. TITAN3 uses only 64 Mbytes of the available 4 Gbytes address space. To run the NetBSD software of the PC532 system, which uses the complete address space, it was necessary to connect the upper address bits to the FPGA. In addition the board was modified to enable 32 Mbytes two bank PS2 memory module operation.
Fig. 2. Bottom view of system pcb with additional wires.
The test sytem was not build to last for ever. I designed a small two layer PCB to connect the power supply and all peripherals to the system board. Figure 3 shows the final appearance of the PC532E system. The NS32532 CPU has a big heat sink mounted on top. The HDD is now placed under the system board.
Fig. 3. PC532E now ready.
There are some interesting tasks to do. First a modification of NetBSD should allow a direct IDE access without command translation inside the FPGA. This would simplify the FPGA and save some resources. The next step could then be a USB host controller inside the FPGA. A software driver for such a hardware is available in the NetBSD world. This refreshments would result in a nice NS32000 system for people who have still working NS32532 CPUs and NS32381 FPUs.
Fig. 4. Successful test of an NS32532 CPU specified for the fastest speed grade (heatsink removed!).
I got my first 30 MHz NS32532 CPU in October 2015. In June 2017 Gilbert sent me a 30 MHz NS32381 - thank you very much! Now I have to make an adapter board for the PLCC package of the NS32381V to fit into the PGA socket for the NS32381U (see right of Figure 4).
Then PC532E will run at 30 MHz :-)
More detailed information about the PC532E can be found here: PC532E Users Guide
This chapter was last modified on 2 July 2017. Next chapter: Richard